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Showing 151 - 155 (155 total)
 
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Shri Hari Rajendran Radhika. Path Selection Based Branching for Coarse Grained Reconfigurable Arrays. Master's thesis, Arizona State University, 2014. PDF PPT [Comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays, Compiler Technique, Embedded Processor.  
152 Add to my selection
Tushar Rawat. Enabling Multithreaded Applications on Hybrid Shared Memory Many-core Architectures. Master's thesis, Arizona State University, 2014. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Scratchpad Memory.  
153 Add to my selection
Ke Bai. Compiler and Runtime for Memory Management on Software Managed Manycore Processors. PhD thesis, Arizona State University, February 2014. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Embedded Processor, Memory Management, Memory Performance, Multi-core Processor, Scratchpad Memory, Software-managed multicores.  
154 Add to my selection
Ke Bai, Aviral Shrivastava and Jing Lu. Stack data management for software managed multi-core processors. http://www.google.com/patents/US9015689, 2015. [Comment]   Bibtex entry
Keywords: Scratchpad Memory, Software-managed multicores, Stack Data.   Note: Patent.
155 Add to my selection
Shri Hari Rajendran Radhika, Aviral Shrivastava and Mahdi Hamzeh. Path Selection Based Acceleration of Conditionals in CGRAs. In Proceedings of the 2015 International Conference on Design Automation and Test in Europe (DATE), 2015. PDF PPT [1 comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays, Compiler Technique.  
Feedback: Aviral Shrivastava
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