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Publications of Abhishek Risheekesan (past Compiler Microarchitecture Lab member)   Download bibtex file Order by:   Type | Year
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Reiley Jeyapaul, Abhishek Risheekesan, Aviral Shrivastava and Kyoungwoo Lee. UnSync-CMP: Multicore CMP Architecture for Energy Efficient Soft Error Reliability. In Transactions on Parallel and Distributed Systems, 2014. PDF [Comment]   Bibtex entry
Keywords: Multi-core Processor, Soft Error.  
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Reiley Jeyapaul, Fei Hong, Aviral Shrivastava, Abhishek Risheekesan and Kyoungwoo Lee. UnSync: A Soft-Error Resilient Redundant Multicore Architecture. In Proceedings of the International Conference on Parallel Processing (ICPP), 2011. PDF PPT [Comment]   Bibtex entry
Keywords: Multi-core Processor, Soft Error.  
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Aviral Shrivastava, Abhishek Risheekesan, Reiley Jeyapaul and Carole-Jean Wu. Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors. In Proceedings of the The 51st Annual Design Automation Conference (DAC), 2014. PDF PPT [Comment]   Bibtex entry
Keywords: , CFC, Soft Error, Verification.  
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Abhishek Risheekesan. Quantitative Evaluation of Control-flow based Soft Error Protection Mechanisms. Master's thesis, Arizona State University, March 2013. PDF PPT [Comment]   Bibtex entry
Keywords: Soft Error.  
Feedback: Aviral Shrivastava
Last modified: Mon November 22 2010 16:16:55
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