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    Created: 2010-11-28 16:11:56     Modified: 2016-03-24 17:14:46
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Aviral Shrivastava, Ilya Issenin and Nikil Dutt. A compiler-in-the-loop framework to explore horizontally partitioned cache architectures. In ASP-DAC '08: Proceedings of the conference on Asia and South Pacific design automation, Pages 328-333, 2008. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Compiler Technique.   Note: ISBN 978-1-4244-1922-7.

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