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    Created: 2010-11-28 16:11:56     Modified: 2016-03-24 17:14:46
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@InProceedings{ShrivastavaDAC2008,
      AUTHOR = {Shrivastava, Aviral and Issenin, Ilya and Dutt, Nikil},
      TITLE = {A compiler-in-the-loop framework to explore horizontally partitioned cache architectures},
      YEAR = {2008},
      BOOKTITLE = {ASP-DAC '08: Proceedings of the conference on Asia and South Pacific design automation},
      PAGES = {328-333},
      PDF = {http://aviral.lab.asu.edu/temp/publications/papers/hpcExplore.pdf},
      SLIDES = {http://aviral.lab.asu.edu/temp/publications/papers/hpcExplore.ppt},
      NOTE = {ISBN 978-1-4244-1922-7},
      KEYWORDS = {Cache, Compiler Technique}
}
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Last modified: Mon November 22 2010 16:16:55
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