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Publications related to 'Cache Vulnerability'   Download bibtex file Order by:   Type | Year
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2017TOP
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Yohan Ko, Reiley Jeyapaul, Youngbin Kim, Kyoungwoo Lee and Aviral Shrivastava. Protecting Caches from Soft Errors: A Microarchitect's Perspective. In ACM Transactions on Embedded Computing Systems (TECS), Vol. 16(4):93:1-93:28, 2017. PDF [Comment]   Bibtex entry
Keywords: Cache Vulnerability, Error Correction, Soft Error, Verification.  
2016TOP
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Srinivas Karthik Tanikella. GemV: A Validated Micro-architecture Vulnerability Estimation Tool. Master's thesis, Arizona State University, 2016. PDF PPT [Comment]   Bibtex entry
Keywords: Cache Vulnerability, Soft Error, Verification.  
3 Add to my selection
Reiley Jeyapaul, Roberto Flores, Alfonso Avila and Aviral Shrivastava. Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability. In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016. PDF [Comment]   Bibtex entry
Keywords: Cache Vulnerability, Fault Injection, Power Efficiency, Register File, Soft Error.  
2013TOP
4 Add to my selection
Reiley Jeyapaul and Aviral Shrivastava. Enabling Energy Efficient Reliability in Embedded Systems Through Smart Cache Cleaning. In Transactions on Design Automation of Electronic Systems, Vol. 18(4):53:1-53:25, October 2013. PDF [Comment]   Bibtex entry
Keywords: Cache, Cache Vulnerability, Soft Error.  
2012TOP
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Kyoungwoo Lee, Aviral Shrivastava and Reiley Jeyapaul. Soft Errors: The Hardware-Software Interface. In Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, Pages 577--578, ACM, New York, NY, USA, 2012. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Cache Vulnerability, Code Placement, Embedded Processor, Power, Soft Error.  
2011TOP
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Reiley Jeyapaul and Aviral Shrivastava. Smart Cache Cleaning: Energy efficient vulnerability reduction in embedded processors. In Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems, Pages 105--114, ACM, 2011. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Cache Vulnerability, Soft Error.  
2010TOP
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Aviral Shrivastava, Jongeun Lee and Reiley Jeyapaul. Cache Vulnerability Equations for protecting data in embedded processor caches from soft errors. In SIGPLAN, Vol. 45(4):143-152, Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems , 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Cache Vulnerability, Embedded Processor, Soft Error.   Note: ISSN 0362-1340.
2008TOP
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Reiley Jeyapaul. Static Analysis to Mitigate Soft Error Failures in Processors. Master's thesis, Arizona State University, 2008. PDF PPT [Comment]   Bibtex entry
Keywords: Cache Vulnerability, Compiler Technique, Soft Error.  
9 Add to my selection
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt and Nalini Venkatasubramanian. Partially Protected Caches to Reduce Failures due to Soft Errors in Mission-Critical Multimedia Systems. Technical report, University of California, Irvine, 24 June 2008. PDF [Comment]   Bibtex entry
Keywords: Cache, Cache Vulnerability, Soft Error.  
Feedback: Aviral Shrivastava
Last modified: Mon November 22 2010 16:16:55
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