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Publications related to 'Embedded Processor'   Download bibtex file Order by:   Type | Year
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2017TOP
1 Add to my selection
Edward Andert. Crossroads - A Time-Sensitive Autonomous Intersection Management Technique. Master's thesis, Arizona State University, 2017. URL PDF PPT [Comment]   Bibtex entry
Keywords: cyber-physical systems, Embedded Processor.  
2 Add to my selection
Edward Andert, Mohammad Khayatian and Aviral Shrivastava. Crossroads - A Time-Sensitive Autonomous Intersection Management Technique. In Proceedings of The 54th Annual Design Automation Conference (DAC), 2017. PDF PPT [Comment]   Bibtex entry
Keywords: cyber-physical systems, Embedded Processor.   Note: (Best Paper Award Candidate).
3 Add to my selection
Jinn-Pean Lin. Optimizing Heap Data Management on Software Managed Many-core Architectures. Master's thesis, Arizona State University, 2017. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Heap, Scratchpad Memory, Software-managed multicores.  
4 Add to my selection
Jian Cai. Scratchpad Management in Software Managed Manycore Architectures. PhD thesis, Arizona State University, 2017. [Comment]   Bibtex entry
Keywords: Code Management, Compiler Technique, Embedded Processor, Heap, Memory Management, Multi-core Processor, Scratchpad Memory, Software-managed multicores, Stack Data.  
2016TOP
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Jian Cai and Aviral Shrivastava. Efficient Pointer Management of Stack Data for Software Managed Multicores. In Proceedings of the International Conference on Application Specific Systems, Architectures and Processors (ASAP), 2016. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Memory Management, Multi-core Processor, Scratchpad Memory, Stack Data.  
6 Add to my selection
Aviral Shrivastava, Nikil Dutt, Jian Cai, Majid Shoushtari, Bryan Donyanavard and Hossein Tajik. Automatic Management of Software Programmable Memories in Manycore Architectures. In IET Computers & Digital Techniques, 2016. PDF [Comment]   Bibtex entry
Keywords: Code Management, Compiler Technique, Design Automation, Embedded Processor, Memory Management, Memory Performance, Multi-core Processor, Scratchpad Memory, Stack Data.  
2015TOP
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Tushar Rawat and Aviral Shrivastava. Enabling Multi-threaded Applications on Hybrid Shared Memory Manycore Architectures. In Proceedings of the 2015 International Conference on Design Automation and Test in Europe (DATE), 2015. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Memory Performance, Scratchpad Memory, Software-managed multicores.  
2014TOP
8 Add to my selection
Ke Bai. Compiler and Runtime for Memory Management on Software Managed Manycore Processors. PhD thesis, Arizona State University, February 2014. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Embedded Processor, Memory Management, Memory Performance, Multi-core Processor, Scratchpad Memory, Software-managed multicores.  
9 Add to my selection
Shri Hari Rajendran Radhika. Path Selection Based Branching for Coarse Grained Reconfigurable Arrays. Master's thesis, Arizona State University, 2014. PDF PPT [Comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays, Compiler Technique, Embedded Processor.  
10 Add to my selection
Tushar Rawat. Enabling Multithreaded Applications on Hybrid Shared Memory Many-core Architectures. Master's thesis, Arizona State University, 2014. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Scratchpad Memory.  
2013TOP
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Ke Bai and Aviral Shrivastava. A Software-Only Scheme for Managing Heap Data on Limited Local Memory (LLM) Multicore Processors. In ACM TECS: ACM Transactions on Embedded Computing Systems, Vol. 13(1):5:1-5:18, August 2013. PDF [Comment]   Bibtex entry
Keywords: Cache, Embedded Processor, Heap, Scratchpad Memory, Software-managed multicores.  
12 Add to my selection
Ke Bai and Aviral Shrivastava. Automatic and Efficient Heap Data Management for Limited Local Memory Multicore Architectures. In Proceedings of the 2013 International Conference on Design Automation and Test in Europe (DATE), 2013. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Compiler Technique, Embedded Processor, Heap, IBM Cell, Memory Management, Memory Performance, Multi-core Processor, Scratchpad Memory, Software-managed multicores.  
13 Add to my selection
Jing Lu, Ke Bai and Aviral Shrivastava. SSDM: Smart Stack Data Management for Software Managed Multicores (SMMs) In Proceedings of the 50th Design Automation Conference (DAC), 2013. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, IBM Cell, Memory Management, Memory Performance, Multi-core Processor, Scratchpad Memory, Software-managed multicores, Stack Data.  
2012TOP
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Jongeun Lee and Aviral Shrivastava. PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems. In ACM TECS: ACM Transactions on Embedded Computing Systems, Vol. 11(2):26:1-26:27, 2012. PDF [Comment]   Bibtex entry
Keywords: Embedded Processor, PICA, Power Aware Computing, Stall Cycle Aggregation.  
15 Add to my selection
Di Lu. STL on Limited Local Memory (LLM) Multi-core Processors. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2012. PDF PPT [Comment]   Bibtex entry
Keywords: Embedded Processor, Heap, IBM Cell, Memory Management, Multi-core Processor, Software-managed multicores.  
16 Add to my selection
Kyoungwoo Lee, Aviral Shrivastava and Reiley Jeyapaul. Soft Errors: The Hardware-Software Interface. In Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, Pages 577--578, ACM, New York, NY, USA, 2012. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Cache Vulnerability, Code Placement, Embedded Processor, Power, Soft Error.  
2011TOP
17 Add to my selection
Ke Bai, Aviral Shrivastava and Saleel Kudchadker. Stack Data Management for Limited Local Memory (LLM) Multi-core Processors. In Proceedings of the International Conference on Application Specific Systems, Architectures and Processors (ASAP), 2011. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, IBM Cell, Memory Management, Scratchpad Memory, Software-managed multicores, Stack Data.  
18 Add to my selection
Ke Bai, Di Lu and Aviral Shrivastava. Vector class on limited local memory (LLM) multi-core processors. In Proceedings of the 14th international conference on Compilers,architectures and synthesis for embedded systems (CASES), Pages 215--224, ACM, New York, NY, USA, 2011. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, IBM Cell, Memory Management, Multi-core Processor, Scratchpad Memory, Software-managed multicores.   Note: ISBN 978-1-4503-0713-0.
2010TOP
19 Add to my selection
Reiley Jeyapaul and Aviral Shrivastava. B2P2: bounds based procedure placement for instruction TLB power reduction in embedded systems. In Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems(SCOPES), Pages 2:1-2:10, 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Code Placement, Compiler Technique, Embedded Processor, Instruction TLB, Memory Management, Power.   Note: ISBN 978-1-4503-0084-1.
20 Add to my selection
Aviral Shrivastava, Jongeun Lee and Reiley Jeyapaul. Cache Vulnerability Equations for protecting data in embedded processor caches from soft errors. In SIGPLAN, Vol. 45(4):143-152, Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems , 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Cache Vulnerability, Embedded Processor, Soft Error.   Note: ISSN 0362-1340.
21 Add to my selection
Ke Bai and Aviral Shrivastava. Heap Data Management for Limited Local Memory (LLM) Multi-core Processors. In Proceedings of the 23th international symposium on System Synthesis (CODES+ISSS), Pages 317-326 , ACM Press, New York, NY, USA , 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Heap, IBM Cell, Memory Management, Multi-core Processor, Scratchpad Memory, Software-managed multicores.   Note: ISBN .
22 Add to my selection
Saleel Kudchadker. Managing Stack Data on Limited Local Memory Multi-core Processors. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, IBM Cell, Multi-core Processor, Scratchpad Memory, Software-managed multicores, Stack Data.  
2009TOP
23 Add to my selection
Rooju Chokshi, Krzysztof Berezowski, Aviral Shrivastava and Stanislaw Piestrak. Exploiting residue number system for power-efficient digital signal processing in embedded processors. In CASES '09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems, Pages 19-28, 2009. PDF PPT [Comment]   Bibtex entry
Keywords: Embedded Processor, Power.   Note: ISBN 978-1-60558-626-7.
24 Add to my selection
Aviral Shrivastava, Ilya Issenin and Nikil Dutt. Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28(3):461-466, 2009. PDF [Comment]   Bibtex entry
Keywords: Cache, Compiler Technique, Embedded Processor, Power Aware Computing.   Note: ISSN 0278-0070.
25 Add to my selection
Arun Kannan. A Software-Only Solution for Stack Management on Systems with Scratch Pad Memory. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2009. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Software-managed multicores, Stack Data.  
26 Add to my selection
Rooju Chokshi. Residue number system enhancements for programmable processors. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2009. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.  
27 Add to my selection
Sai Krishna Mylavarapu. Improving Application Response Times of Nand Flash based Systems. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2009. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.  
2008TOP
28 Add to my selection
Sanghyun Park, Aviral Shrivastava and Yunheung Paek. Hiding cache miss penalty using priority-based execution for embedded processors. In DATE '08: Proceedings of the conference on Design, automation and test in Europe, 2008. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Embedded Processor.   Note: ISBN 978-3-9810801-3-1.
29 Add to my selection
Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj and Sarma Vrudhula. Power Reduction of Functional Units Considering Temperature and Process Variations. In VLSID'08: Proceedings of the 21st International Conference on VLSI Design, Pages 533--539, IEEE Computer Society, Washington, DC, USA , 2008. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Power Aware Computing.   Note: ISBN 0-7695-3083-4. [Annote]
30 Add to my selection
Prabhat Mishra and Aviral Shrivastava. ADL-driven Methodologies for Design Automation of Embedded Processors. In Processor Description Languages, Pages 13-33, Chapter 2, Elsevier Inc., 2008. PDF [Comment]   Bibtex entry
Keywords: Design Automation, Embedded Processor, Embedded System.  
2007TOP
31 Add to my selection
Sanghyun Park, Aviral Shrivastava, Eugene Earlie, Nikil Dutt, Alexandru Nicolau and Yunheung Paek. Automatic Design Space Exploration of Register Bypasses in Embedded Processors. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26(12):2102-2115, 2007. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.   Note: ISSN 0278-0070.
32 Add to my selection
Aviral Shrivastava and Nikil Dutt. Compiler Aided Design of Embedded Computers. In The Compiler Design Handbook: Optimizations and Machine Code Generation:2nd Edition, 2007. URL [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.  
2006TOP
33 Add to my selection
Sanghyun Park, Eugene Earlie, Aviral Shrivastava, Alexandru Nicolau, Nikil Dutt and Yunheung Paek. Automatic Generation of Operation Tables for Fast Exploration of Bypasses in Embedded Processors. In DATE '06: Proceedings of the conference on Design, automation and test in Europe, Pages 1197-1202, 2006. PDF PPT [Comment]   Bibtex entry
Keywords: BAC, Embedded Processor.   Note: ISBN 3-9810801-0-6.
34 Add to my selection
Prabhat Mishra, Aviral Shrivastava and Nikil Dutt. Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs. In ACM Transactions on Design Automation of Electronic Systems, Vol. 11(3):626-658, 2006. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.   Note: ISSN 1084-4309.
35 Add to my selection
Aviral Shrivastava, Eugene Earlie, Nikil Dutt and Alexandru Nicolau. Retargetable pipeline hazard detection for partially bypassed processors. In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 14:791-801, 2006. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.   Note: ISBN 1063-8210.
36 Add to my selection
Aviral Shrivastava, Partha Biswas, Ashok Halambi, Nikil Dutt and Alexandru Nicolau. Compilation framework for code size reduction using reduced bit-width ISAs (rSAs) In ACM Transactions on Design Automation of Electronic Systems, Vol. 11(1):123-146, 2006. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.   Note: ISSN 1084-4309.
37 Add to my selection
Aviral Shrivastava. Compiler-in-Loop Exploration of Programmable Embedded Systems. PhD thesis, Donald Bren School of Information and Computer Sciences , 2006. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.  
2003TOP
38 Add to my selection
Sudeep Pasricha, Partha Biswas, Prabhat Mishra, Aviral Shrivastava, Atri Mandal, Nikil Dutt and Alexandru Nicolau. A Framework for GUI-driven Design Space Exploration of a MIPS4K-like processor. Technical report, University of California, Irvine, April 2003. PDF [Comment]   Bibtex entry
Keywords: Embedded Processor, Instruction Set Architecture.  
2001TOP
39 Add to my selection
Ashok Halambi, Aviral Shrivastava, Nikil Dutt and Alexandru Nicolau. A customizable compiler framework for embedded systems. In In SCOPES, Springer, 2001. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor.  
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Last modified: Mon November 22 2010 16:16:55
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