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Jared Pager, Reiley Jeyapaul and Aviral Shrivastava. A Software Scheme for Multithreading on CGRAs. In ACM Transactions on Embedded Computing Systems (TECS), 2015. PDF [Comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays, Embedded System, Instruction Scheduling, Multithreading, Power Efficiency.  
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Sanghyun Park, Aviral Shrivastava, Nikil Dutt, Alexandru Nicolau, Yunheung Paek and Eugene Earlie. Bypass Aware Instruction Scheduling for Register File Power Reduction. In Proceedings of the conference on Language, Compilers and Tool support for Embedded Systems, Pages 173-181, 2006. PDF PPT [Comment]   Bibtex entry
Keywords: BAC, Instruction Scheduling, Register File.   Note: ISBN 0362-1340.
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Mahesh Balasubramanian, Shail Dave, Aviral Shrivastava and Reiley Jeyapaul. LASER: A Hardware/Software Approach to Accelerate Complicated Loops on CGRAs. In Proceedings of the 21st International Conference on Design Automation and Test in Europe (DATE), 2018. PDF [Comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays, Instruction Scheduling.  
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Last modified: Mon November 22 2010 23:16:55