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Aviral Shrivastava, Deepa Kannan, Sarvesh Bhardwaj and Sarma Vrudhula. Reducing Functional Unit Power Consumption and its Variation using Leakage Sensors. In IEEE TVLSI : IEEE Transactions on Very Large Scale Integration Systems, Vol. 18(6):988-997, 2010. PDF [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
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Reiley Jeyapaul and Aviral Shrivastava. Code Transformations for TLB Power Reduction. In International Journal of Parallel Programming, Vol. 38(3-4):254-276, Springer US, 2010. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Instruction TLB, Power, Power Aware Computing.   Note: ISSN 0885-7458. [Annote]
InProceedingsTOP
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Reiley Jeyapaul and Aviral Shrivastava. B2P2: bounds based procedure placement for instruction TLB power reduction in embedded systems. In Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems(SCOPES), Pages 2:1-2:10, 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Code Placement, Compiler Technique, Embedded Processor, Instruction TLB, Memory Management, Power.   Note: ISBN 978-1-4503-0084-1.
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Rooju Chokshi, Krzysztof Berezowski, Aviral Shrivastava and Stanislaw Piestrak. Exploiting residue number system for power-efficient digital signal processing in embedded processors. In CASES '09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems, Pages 19-28, 2009. PDF PPT [Comment]   Bibtex entry
Keywords: Embedded Processor, Power.   Note: ISBN 978-1-60558-626-7.
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Jongeun Lee and Aviral Shrivastava. Compiler-managed register file protection for energy-efficient soft error reduction. In ASP-DAC '09: Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, Pages 618-623, 2009. PDF PPT [Comment]   Bibtex entry
Keywords: Power, Soft Error.   Note: ISBN 978-1-4244-2748-2.
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Reiley Jeyapaul, Sandeep Marathe and Aviral Shrivastava. Code Transformations for TLB Power Reduction. In VLSID '09: Proceedings of the International Conference on VLSI Design, Pages 413-418, 2009. PDF PPT [Comment]   Bibtex entry
Keywords: Power.   Note: ISBN 978-0-7695-3506-7.
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Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sarvesh Bhardwaj and Sarma Vrudhula. Temperature and Process Variations aware Power Gating of Functional Units. In VLSID '08: Proceedings of the 21st International Conference on VLSI Design, Pages 515-520, 2008. PDF PPT [Comment]   Bibtex entry
Keywords: Power, Power gating, PTV.   Note: ISBN 0-7695-3083-4.
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Michael A. Baker, Aviral Shrivastava and Karam S. Chatha. Smart driver for power reduction in next generation bistable electrophoretic display technology. In CODES+ISSS '07: Proceedings of international conference on Hardware/software codesign and system synthesis, Pages 197-202, 2007. PDF PPT [Comment]   Bibtex entry
Keywords: Power.   Note: ISBN 978-1-59593-824-4.
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Jonghee Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn and Yunheung Paek. Power Conscious Mapping onto Coarse-Grained Reconfigurable Architectures using Graph Drawing based Algorithm. In WASP '07: Workshop on Application Specific Processors, 2007. PDF PPT [Comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays, Power.  
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Piotr Patronik, Krzysztof Berezowski, Stanislaw Piestrak, Janusz Biernat and Aviral Shrivastava. Fast and Energy-Efficient Constant-Coefficient FIR Filters Using Residue Number System. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2011. PDF [Comment]   Bibtex entry
Keywords: Power.  
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Jeffrey Boyd, Hari Sundaram and Aviral Shrivastava. Power-Accuracy Tradeoffs in Human Activity Transition Detection. In Proceedings of the 2010 International Conference on Design Automation and Test in Europe (DATE), 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
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Kyoungwoo Lee, Aviral Shrivastava and Reiley Jeyapaul. Soft Errors: The Hardware-Software Interface. In Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, Pages 577--578, ACM, New York, NY, USA, 2012. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Cache Vulnerability, Code Placement, Embedded Processor, Power, Soft Error.  
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Bryce Holton, Ke Bai, Aviral Shrivastava and Harini Ramaprasad. Construction of GCCFG for Inter-procedural Optimizations in Software Managed Manycore (SMM) Architectures. In Proceedings of the 2014 international conference on Compilers, architecture, and synthesis for embedded systems (CASES), 2014. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Power, Scratchpad Memory, Software-managed multicores.  
InBookTOP
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Preeti Ranjan Panda, B.V.N. Silpa, Aviral Shrivastava and Krishnaiah Gummidipudi. Basic Low Power Digital Design. In Power-efficient System Design, (978-1-4419-6387-1):11-39, Chapter 2, Springer US, 2010. PDF [Comment]   Bibtex entry
Keywords: Power, Power gating.  
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Preeti Ranjan Panda, B.V.N. Silpa, Aviral Shrivastava and Krishnaiah Gummidipudi. Power Aware Operating Systems, Compilers, and Application Software. In Power-efficient System Design, (978-1-4419-6387-1):139-181, Chapter 5, Springer US, 2010. [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
PhdThesisTOP
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Reiley Jeyapaul. Smart Compilers for Reliable and Power-efficient Embedded Computing. PhD thesis, Arizona State University, May 2012. PDF PPT [Comment]   Bibtex entry
Keywords: Code Placement, Compiler Technique, Power, Power Aware Computing, Soft Error.  
BookTOP
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Preeti Ranjan Panda, Aviral Shrivastava, B.V.N. Silpa and Krishnaiah Gummidipudi. Power-Efficient System Design. Springer, 1st edition edition, 2010. URL [Comment]   Bibtex entry
Keywords: Power.  
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Last modified: Mon November 22 2010 16:16:55
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