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Publications related to 'Power Aware Computing'   Download bibtex file Order by:   Type | Year
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Aviral Shrivastava, Ilya Issenin and Nikil Dutt. Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28(3):461-466, 2009. PDF [Comment]   Bibtex entry
Keywords: Cache, Compiler Technique, Embedded Processor, Power Aware Computing.   Note: ISSN 0278-0070.
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Sanghyun Park, Aviral Shrivastava, Nikil Dutt, Alexandru Nicolau, Yunheung Paek and Eugene Earlie. Register File Power Reduction Using Bypass Sensitive Compiler. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27(6):1155-1159, June 2008. PDF [Comment]   Bibtex entry
Keywords: Power Aware Computing, Register File.   Note: ISSN 0278-0070 .
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Aviral Shrivastava, Deepa Kannan, Sarvesh Bhardwaj and Sarma Vrudhula. Reducing Functional Unit Power Consumption and its Variation using Leakage Sensors. In IEEE TVLSI : IEEE Transactions on Very Large Scale Integration Systems, Vol. 18(6):988-997, 2010. PDF [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
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Jongeun Lee and Aviral Shrivastava. PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems. In ACM TECS: ACM Transactions on Embedded Computing Systems, Vol. 11(2):26:1-26:27, 2012. PDF [Comment]   Bibtex entry
Keywords: Embedded Processor, PICA, Power Aware Computing, Stall Cycle Aggregation.  
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Reiley Jeyapaul and Aviral Shrivastava. Code Transformations for TLB Power Reduction. In International Journal of Parallel Programming, Vol. 38(3-4):254-276, Springer US, 2010. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Instruction TLB, Power, Power Aware Computing.   Note: ISSN 0885-7458. [Annote]
InProceedingsTOP
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Aviral Shrivastava, Ilya Issenin and Nikil Dutt. Compilation techniques for energy reduction in horizontally partitioned cache architectures. In CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems, Pages 90-96, 2005. PDF PPT [Comment]   Bibtex entry
Keywords: Cache, Compiler Technique, Power Aware Computing.   Note: ISBN 1-59593-149-X.
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Jeffrey Boyd, Hari Sundaram and Aviral Shrivastava. Power-Accuracy Tradeoffs in Human Activity Transition Detection. In Proceedings of the 2010 International Conference on Design Automation and Test in Europe (DATE), 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
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Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj and Sarma Vrudhula. Power Reduction of Functional Units Considering Temperature and Process Variations. In VLSID'08: Proceedings of the 21st International Conference on VLSI Design, Pages 533--539, IEEE Computer Society, Washington, DC, USA , 2008. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Power Aware Computing.   Note: ISBN 0-7695-3083-4. [Annote]
InBookTOP
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Preeti Ranjan Panda, B.V.N. Silpa, Aviral Shrivastava and Krishnaiah Gummidipudi. Power Aware Operating Systems, Compilers, and Application Software. In Power-efficient System Design, (978-1-4419-6387-1):139-181, Chapter 5, Springer US, 2010. [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
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Reiley Jeyapaul. Smart Compilers for Reliable and Power-efficient Embedded Computing. PhD thesis, Arizona State University, May 2012. PDF PPT [Comment]   Bibtex entry
Keywords: Code Placement, Compiler Technique, Power, Power Aware Computing, Soft Error.  
Feedback: Aviral Shrivastava
Last modified: Mon November 22 2010 16:16:55
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