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Publications of Year << 2010 >>   Download bibtex file
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Aviral Shrivastava, Deepa Kannan, Sarvesh Bhardwaj and Sarma Vrudhula. Reducing Functional Unit Power Consumption and its Variation using Leakage Sensors. In IEEE TVLSI : IEEE Transactions on Very Large Scale Integration Systems, Vol. 18(6):988-997, 2010. PDF [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
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Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt and Nalini Venkatasubramanian. Partitioning Techniques for Partially Protected Caches in Resource-Constrained Embedded Systems. In ACM TODAES: ACM Transactions on Design Automation of Embedded Systems, Vol. 15(4):30:1-30:30, October 2010. PDF [Comment]   Bibtex entry
Keywords: Cache, Soft Error.  
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Jongeun Lee and Aviral Shrivastava. A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register Files. In IEEE TCAD: IEEE Transactions on Computer Aided Design, Vol. 29(7):1018-1027, July 2010. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Register File, Soft Error.  
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Reiley Jeyapaul and Aviral Shrivastava. Code Transformations for TLB Power Reduction. In International Journal of Parallel Programming, Vol. 38(3-4):254-276, Springer US, 2010. PDF [Comment]   Bibtex entry
Keywords: Compiler Technique, Instruction TLB, Power, Power Aware Computing.   Note: ISSN 0885-7458. [Annote]
<< InProceedings >> TOP
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Aviral Shrivastava, Jongeun Lee and Reiley Jeyapaul. Cache Vulnerability Equations for protecting data in embedded processor caches from soft errors. In SIGPLAN, Vol. 45(4):143-152, Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems , 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Cache Vulnerability, Embedded Processor, Soft Error.   Note: ISSN 0362-1340.
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Seungchul Jung, Aviral Shrivastava and Ke Bai. Dynamic code mapping for limited local memory systems. In Proceedings of the International Conference on Application-specific Systems Architectures and Processors (ASAP), July 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Code Management, Compiler Technique, IBM Cell, Memory Management, Multi-core Processor, Scratchpad Memory, Software-managed multicores.   Note: ISSN 1063-6268.
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Reiley Jeyapaul and Aviral Shrivastava. B2P2: bounds based procedure placement for instruction TLB power reduction in embedded systems. In Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems(SCOPES), Pages 2:1-2:10, 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Code Placement, Compiler Technique, Embedded Processor, Instruction TLB, Memory Management, Power.   Note: ISBN 978-1-4503-0084-1.
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Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee Yoon and Yunheung Paek. Operation and data mapping for CGRAs with multi-bank memory. In Proceedings of the 2010 International Conference on Languages Compilers and Tools for Embedded Systems (LCTES), Vol. 45(4):17-26, 2010. PDF PPT [Comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays, Memory Management.   Note: ISSN 0362-1340.
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Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee Yoon and Yunheung Paek. Memory-Aware Application Mapping on Coarse Grain Reconfigurable Arrays. In Proceedings of the 2010 International Conference on High-Performance Embedded Architectures and Compilers (HIPEAC), Vol. 45(4):17-26, 2010. PDF PPT [Comment]   Bibtex entry
Keywords: CGRA, Coarse-Grained Reconfigurable Arrays.   Note: ISSN 0362-1340.
10 Add to my selection
Jeffrey Boyd, Hari Sundaram and Aviral Shrivastava. Power-Accuracy Tradeoffs in Human Activity Transition Detection. In Proceedings of the 2010 International Conference on Design Automation and Test in Europe (DATE), 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
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Ke Bai and Aviral Shrivastava. Heap Data Management for Limited Local Memory (LLM) Multi-core Processors. In Proceedings of the 23th international symposium on System Synthesis (CODES+ISSS), Pages 317-326 , ACM Press, New York, NY, USA , 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, Heap, IBM Cell, Memory Management, Multi-core Processor, Scratchpad Memory, Software-managed multicores.   Note: ISBN .
12 Add to my selection
Tom Vander Aa, Praveen Raghavan, Scott Mahlke, Bjorn De Sutter, Aviral Shrivastava and Frank Hannig. Compilation Techniques for CGRAs: Exploring All Parallelization Approaches. Pages 185-186, Hardware/Software Codesign and System Synthesis (CODES+ISSS), 24-29 October 2010. PDF [Comment]   Bibtex entry
<< InBook >> TOP
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Preeti Ranjan Panda, B.V.N. Silpa, Aviral Shrivastava and Krishnaiah Gummidipudi. Basic Low Power Digital Design. In Power-efficient System Design, (978-1-4419-6387-1):11-39, Chapter 2, Springer US, 2010. PDF [Comment]   Bibtex entry
Keywords: Power, Power gating.  
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Preeti Ranjan Panda, B.V.N. Silpa, Aviral Shrivastava and Krishnaiah Gummidipudi. Power Aware Operating Systems, Compilers, and Application Software. In Power-efficient System Design, (978-1-4419-6387-1):139-181, Chapter 5, Springer US, 2010. [Comment]   Bibtex entry
Keywords: Power, Power Aware Computing.  
<< MastersThesis >> TOP
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Saleel Kudchadker. Managing Stack Data on Limited Local Memory Multi-core Processors. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Compiler Technique, Embedded Processor, IBM Cell, Multi-core Processor, Scratchpad Memory, Software-managed multicores, Stack Data.  
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Fei Hong. UnSync: A Soft-Error Resilient Redundant CMP Architecture. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2010. PDF [Comment]   Bibtex entry
Keywords: Multi-core Processor, Soft Error.  
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Seungchul Jung. Dynamic Code Mapping for Limited Local Memory Systems. Master's thesis, School of Computing, Informatics, and Decision Systems Engineering (CIDSE), 2010. PDF PPT [Comment]   Bibtex entry
Keywords: Code Management, Compiler Technique, IBM Cell, Multi-core Processor, Scratchpad Memory, Software-managed multicores.  
<< Book >> TOP
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Preeti Ranjan Panda, Aviral Shrivastava, B.V.N. Silpa and Krishnaiah Gummidipudi. Power-Efficient System Design. Springer, 1st edition edition, 2010. URL [Comment]   Bibtex entry
Keywords: Power.  
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Last modified: Mon November 22 2010 16:16:55
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